This invention relates to active matrix liquid crystal display devices comprising a row and column array of display elements each of which is connected to a transistor, sets of row and column address conductors connected to the transistors, each display element having an associated storage capacitor connected between the display element and a row address conductor adjacent that to which the transistor associated with the display element is connected, and a drive circuit for applying data signals to the column conductors and, during a row address period for each row of display elements, a selection pulse signal to each row conductor in sequence for driving the display elements, the drive circuit being arranged to provide adjacent to a selection pulse signal in the row drive waveform a step level which exists at the termination of a selection pulse signal on an adjacent row conductor and contributes to a drive voltage obtained on a display element via its associated storage capacitor.
Active matrix liquid crystal (LC) display devices using thin film transistors (TFTs) are well known. The general operation of a typical device and its manner of construction are described, for example, in U.S. Pat. No. 5,130,829. A number of different approaches to improving display quality and performance have been pursued. One particular technique which has been introduced to improve the quality of the display output, especially image sticking effects, by compensating for the dc voltage coupled onto a display element via the gate-drain capacitance of its associated TFT and to enable lower voltage column drive circuitry to be employed is the so-called capacitively coupled drive scheme. This scheme is applicable to display devices which use storage capacitors in association with the display elements that are connected to an adjacent row address conductor (i.e. different to that to which the display element""s TFT is connected) and which operate in a line, (row), or field inversion mode. Rather than the waveform supplied to each row address conductor comprising simply a hold level and, once per field period, a selection (gating) pulse level which is operable to turn on the TFTs connected to that conductor in a respective row address period, the waveform used in this scheme further includes an intermediate step level. In operation, the display element is charged, through its associated TFT, to a certain level according to the value of the supplied data signal and once the TFT has been turned off at the end of the selection pulse signal to isolate the display element a voltage step of the waveform applied to the adjacent row address conductor is coupled onto the display element via the storage capacitor to take the final display element voltage to a desired level to produce a required display effect, i.e. gradation level, from the display element. Thus, a step level of the waveform applied to one row address conductor contributes to the voltages obtained on the display elements in a row selected by a different, adjacent, row address conductor via their associated storage capacitors. By appropriate adjustment of the step level, this technique can be used to compensate for kickback effects.
Examples of capacitively coupled drive schemes used in TFT LC display devices are described in the paper by E. Takeda et al entitled xe2x80x9cSimplified Method of Capacitively Coupled Driving for TFT-LCDxe2x80x9d published in Proc. Japan Display ""89, pages 580-583, and the paper by T. Kamiya et al entitled xe2x80x9cA Novel Driving Method of TFT-LCD with Low Power Consumptionxe2x80x9d published in Proc. AMLCD ""94, Tokyo, pages 60-62. In the former, the storage capacitor associated with a display element is connected to the preceding adjacent row address conductor and the step level follows the selection pulse signal while in the latter the storage capacitor is connected to the succeeding adjacent row address conductor, and the step level is before the selection pulse. The terms preceding and succeeding here refer to the sequence in which the rows are addressed.
These known schemes suffer from two problems. Firstly, the scan direction, that is, the order in which the rows of display elements are addressed, is predetermined by the way the storage capacitor is connected. Although the rows can be addressed in sequence, one at a time, from top to bottom for example, the scan direction cannot be reversed, whereby the rows are addressed from bottom to top, without changing the row conductor waveforms. It is sometimes advantageous to be able to reverse the scan direction, for example, in projection display systems where the projector unit can be either floor or ceiling mounted, or in car display systems where the display device can be mounted above or below the dashboard. Secondly, it is not possible to implement a dot-inversion drive scheme where the polarity of the display voltages on display elements in adjacent columns alternates, in addition to the polarity of successive display elements in a column alternating, i.e. a combination of column and row inversion. Such dot-inversion schemes are helpful in reducing the extent of perceived flicker, and in producing generally less horizontal cross-talk and better uniformity.
It is an object of the present invention to provide an active matrix display device which is operable in a capacitively coupled drive mode and in which the above limitations can be overcome.
According to the present invention, an active matrix display device of the kind described in the opening paragraph is characterised in that the drive circuit is arranged to provide in the row drive waveform applied to each row conductor a step level both before and after the selection pulse signal. By the relatively simple, and convenient, means of providing a further step level adjacent the selection pulse signal in symmetrical relationship to the existing step level, which may precede or follow the selection pulse signal, it is readily possible to reverse the scan direction for the display device. When scanned in reverse, the further step level operates in similar manner to the known step level for capacitively coupled driving purposes. Importantly, this further step level does not effect significantly the display element addressing when driving the display device in the original scan direction and conversely the known step level does not effect the display elements when the scan direction is reversed.
Moreover, and importantly, the provision of step levels to either side of the selection pulse signal enables a dot-inversion drive scheme to be used if desired. In a preferred embodiment enabling a dot-inversion drive scheme, the transistors of a row of display elements are alternately connected to first and second adjacent row conductors and the storage capacitors of the display elements in the row are connected respectively to the other one of first and second row conductors.